Leveraging FPGAs to Empower Research and Reduce Operational Costs

Today's informatics and genomics professionals have a wide range of computing options, from internal and remote clusters to symmetric multiprocessor systems to accelerated hardware such as the TimeLogic solutions.

Identifying the ideal combination of technologies to achieve your institution's computing goals requires more than a cursory comparison of CPU speeds. A comprehensive approach is needed to assess your current and projected computing requirements.

With GenBank growing at an unprecedented rate due to the preponderance of next-gen sequencing systems, the need for fast, reliable sequence comparison engines is growing.

We estimate that over 800 next-gen sequencers are in place currently, though the NGS analysis pipelines are only beginning to mature for applications such as metagenomics, transcriptomics and human resequencing.

Beyond Genbank and Uniprot, data from major projects such as the 1000 Genomes Projects, RAST metagenomics server, the Cancer Genome Atlas, and many independent human genome projects will soon provide unparalleled reference sources for genome annotation and comparative genomics.

Both high coverage short-read data resources and longer 454 assemblies will be available to improve annotation accuracies and for novel gene discovery.

involving server room capacity, high voltage AC (HVAC) for heat dissipation, rackspace, power requirements, UPS protection, storage and networking performance. This can require significant input and evaluation time from a wide range of experts within your organization. Once these factors are ascertained, you can evaluate the cost of computing for specific tasks.

When developing our high performance biocomputing solutions, TimeLogic identified Field Programmable Gate Array (FPGA) technology as the ideal way to maximize performance, product lifespan, and IT budgets.

FPGA Engineering Benefits

Field programmable gate arrays (FPGAs) technology represents a flexible class of computing chip that offers the following benefits

1. performance advantage for highly parallel applications
2. hardware "load files" can be updated through software patches
3. The same circuitboard arrayed with FPGA chips can run multiple algorithms
4.

that have performance advantages of hardware-level algorithms, but can also be modified through software updates.

FPGAs doe not require the logic designer to make critical decisions early in the product's life cycle, providing us greater flexibility for algorithm improvements and updates.

FPGAs applications are not restricted to a rigid datapath bit-width, therefore it can fully utilize each chip's logic resources and in which path width is set dynamically.

The recent history of bioinformatics, however, is characterized by rapid improvement in the state-of-the-art, creating significant risk of early obsolescence for hardware-based solutions. Only by being proactive in reviewing improvements......

FPGAs are based on device physics and also improve over time according to Moore's Law. Therefore we are able to release card upgrades approximately every 2-3 years. Often these can take advantage of other improvements in bus architecture for dramatically faster solutions.

FPGAs are not specific to a particular application, and are therefore manufactured in very large quantities.  As a result, their finer geometry yields higher speed at lower power dissipation per logic element, contributing to overall system reliability.

FPGA devices are tested "generically" by the FPGA vendor and process variation issues are dealt with by the FPGA vendor, who has made a multi-million dollar investment in these engineering tools and systems. 

Advantages of FPGA-Based Accelerators vs. ASICs

DeCypher's use of FPGA based logic permits our design staff to ...

Since FPGAs can be rewired "on-the-fly" during in-field use,

each algorithm is implemented as a separate "logic configuration file". Each algorithm can run in a single clock cycle (two in some case) at very high speed because each is separately optimized without on-chip constraints imposed by any other algorithm.

We control the chip clockrate according to the performance obtainable with each algorithm, independent of any other algorithm. 

Similarly, the entire on-chip logical resources of the FPGA can be devoted to maximizing the packing density of a particular algorithm's processing cell independent of other algorithms'.

FPGAs do not force a rigid predefined limit on the number of cells per chip.

Switching FPGA wiring between algorithms is brief (less than 0.5 seconds), and is transparent to the user. So even when the job queue contains alternating Tera-BLAST and Smith-Waterman jobs, for instance, no significant performance loss is observed.

Each algorithm's "logic cell" (also called a "processing element" or PE) is as small as possible, maximizing the opportunity for on-chip parallelism.

And, new unanticipated algorithms may be added to DeCypher by distribution of new data files, as simply as a software update is installed on a conventional computer.

Leading edge server components complement our FPGA hardware to extend product lifecycle

FPGA-based accelerators, in conjunction with standard x86 hardware, yields a very long product life.

In the event of changed algorithm logic, or if a logic design flaw is discovered, FPGA design files may be easily changed and recompiled much like conventional software.The updated configuration file can be downloaded and immediately installed with a simple software update.

DeCypher systems include built-in 2d clustering.

Each accelerator board is coupled to high-performance CPUs, RAM and storage which has been validated for compatibility. 

We view these pipelines as a commodity that varies in price-performance over time according to Moore's Law. 

As you need to scale up,  additional accelerated nodes—which may contain faster CPUs or FPGA hardware—can be added to the cluster.

This means you don't have to discard any hardware, and minimizes the hassle of upgrades, and keeps your existing pipelines ...

Over time, the price-performance of the underlying technology will improve, and we pass that on to you.  By using industry standard PC technology with our FPGA arrays, both we and you enjoy the rapid improvement in price-performance of the PC industry.  Systems that are custom designed and hardwired for the smaller bioinformatics community have much less downward pricing pressure driving their product designs and marketing.